Angus Dorbie (dorbie++at++sgi.com)
Thu, 29 Apr 1999 11:50:15 -0700
But Sirius loads straight to TRAM.
Your claim that the texture corresponds to the screen area of the
polygon makes no sense.
There is sample code in /usr/share/Performer
Cheers,Angus.
Satheesh Ganapathi Subramanian wrote:
>
> Hi,
>
> I'm using performer for displaying a video texture. I get the video input
> from a Sirius video on a Onyx10000 Infinite Reality machine. While the
> video is initialized on one thread, the texture is created on another
> thread using shared memory. The output is that I'm not getting the video
> texture on the polygon, but instead, I'm getting the screen capture
> pertaining to the polygon's display area, at the time of texturing.
>
> To summarize, I would like to know if video can be initialized on one
> thread and the texturing performed on another thread. The texture and
> vertex coordinates are stored in pfShared memory created on the second
> thread.
>
> Thanx,
> Satheesh
>
> PS: The hardware config of the machine if it will be of some use is:
>
> CPU Board at Slot 4: (Enabled)
> Processor 0 at Slot 4/Slice 0: 194 Mhz R10000 with 1 MB secondary cache
> (Enabled)
> Processor 1 at Slot 4/Slice 1: 194 Mhz R10000 with 1 MB secondary cache
> (Enabled)
> Processor 2 at Slot 4/Slice 2: 194 Mhz R10000 with 1 MB secondary cache
> (Enabled)
> Processor 3 at Slot 4/Slice 3: 194 Mhz R10000 with 1 MB secondary cache
> (Enabled) CPU: MIPS R10000 Processor Chip Revision: 2.5 FPU: MIPS R10010
> Floating Point Chip Revision: 0.0 Secondary unified instruction/data cache
> size: 1 Mbyte Data cache size: 32 Kbytes Instruction cache size: 32 Kbytes
> Main memory size: 512 Mbytes, 4-way interleaved MC3 Memory Board at Slot
> 8: 256 MB of memory (Enabled)
> Bank A contains 16 MB SIMMS (Enabled)
> Bank B contains 16 MB SIMMS (Enabled)
> Bank C contains 16 MB SIMMS (Enabled)
> Bank D contains 16 MB SIMMS (Enabled) MC3 Memory Board at Slot 10: 256
> MB of memory (Enabled)
> Bank A contains 16 MB SIMMS (Enabled)
> Bank B contains 16 MB SIMMS (Enabled)
> Bank C contains 16 MB SIMMS (Enabled)
> Bank D contains 16 MB SIMMS (Enabled) I/O board, Ebus slot 9: IO4
> revision 1 I/O board, Ebus slot 11: IO4 revision 1 Integral EPC serial
> ports: 8 Graphics board: InfiniteReality (config 0x00000003) Graphics
> board: InfiniteReality (config 0x00000003) Integral Ethernet controller:
> et0, Ebus slot 11 EPC external interrupts Integral SCSI controller 91:
> Version WD33C95A, differential, revision 0 Integral SCSI controller 90:
> Version WD33C95A, single ended, revision 0 Integral SCSI controller 1:
> Version WD33C95A, differential, revision 0
> Disk drive: unit 6 on SCSI controller 1
> Disk drive: unit 2 on SCSI controller 1
> Disk drive: unit 1 on SCSI controller 1 Integral SCSI controller 0:
> Version WD33C95A, single ended, revision 0
> Tape drive: unit 7 on SCSI controller 0: QIC 150
> Sirius video: unit 0 revision 5 on bus 0 with CPI DGI BOB options CC
> synchronization join counter
> Integral EPC parallel port: Ebus slot 9
> Integral EPC parallel port: Ebus slot 11
> VME bus: adapter 0 mapped to adapter 45
> VME bus: adapter 38 VME bus: adapter 45
>
> -----------------------------------------------------------------------
> List Archives, FAQ, FTP: http://www.sgi.com/software/performer/
> Submissions: info-performer++at++sgi.com
> Admin. requests: info-performer-request++at++sgi.com
-- "Microsoft's system was like a forest that hadn't had a controlled burn in decades, just waiting for one person with a match to turn it into a disaster. Melissa was Microsoft's fault. They left their system wide open to this sort of abuse, they knew it could happen and did nothing." -- Bruce PerensFor advanced 3D graphics Performer + OpenGL based examples and tutors: http://www.dorbie.com/
This archive was generated by hypermail 2.0b2 on Thu Apr 29 1999 - 11:50:21 PDT