Re: 1pipe - 2 tasks

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Angus Dorbie (dorbie++at++sgi.com)
Wed, 03 Mar 1999 09:33:24 -0800

Why don't you try and block them against each other through shared
memory on the CPU. That way you'll just get 2 context switches a frame.

Cheers,Angus.

Kearney, Ken wrote:
>
> It has been become painfully apparent that I am breaking one of the cardinal
> rules of visualization. That being "Though shalt not run multiple tasks
> through a single graphics pipe". I'm apparently getting killed due to
> "context switching" and other things.
> Task 1 is (performer - 3D stuff) a 3D scenegraph based on perfly
> (battlefield visualization w/ terrain and many entities displayed)
>
> Task 2 is (irixGL - 2D stuff) a task that opens seven irixGL
> windows(including a 2D bird's eye view map and other displays with various
> symbols)
>
> Below are stats pulled from the Graphics section of an osview with both
> tasks running, just the 2D stuff task running, and just the 3D stuff running
> ->
> both tasks 2d stuff 3d stuff
> Graphics
> griioctl 22 148 20
> gintr 630 149 95
> swapbuf 7 38 10
> switch 230 41 2
> fifowait 213 24 12
> fifonwait 0 0 0
>
> Sooooo, assuming I can't get funding for another graphics pipe and are
> constrained to running the two tasks on a single platform, are there any low
> cost hardware enhancements or s/w tricks I can use to run these two separate
> graphics tasks through a single graphics pipe and get reasonable
> interactivity with the displays using mouse and keyboard commands.
>
> My machine has the following hinv and gfxinfo:
> HINV--->>>
> Processor 0: 194 MHZ IP25
> CPU: MIPS R10000 Processor Chip Revision: 2.6
> FPU: MIPS R10010 Floating Point Chip Revision: 0.0
> Processor 1: 194 MHZ IP25
> CPU: MIPS R10000 Processor Chip Revision: 2.6
> FPU: MIPS R10010 Floating Point Chip Revision: 0.0
> Processor 2: 196 MHZ IP25
> CPU: MIPS R10000 Processor Chip Revision: 2.5
> FPU: MIPS R10010 Floating Point Chip Revision: 0.0
> Processor 3: 196 MHZ IP25
> CPU: MIPS R10000 Processor Chip Revision: 2.6
> FPU: MIPS R10010 Floating Point Chip Revision: 0.0
> Secondary unified instruction/data cache size: 1 Mbyte
> Data cache size: 32 Kbytes
> Instruction cache size: 32 Kbytes
> Main memory size: 256 Mbytes, 2-way interleaved
> I/O board, Ebus slot 7: IO4 revision 1
> I/O board, Ebus slot 11: IO4 revision 1
> Integral EPC serial ports: 8
> Graphics board: InfiniteReality
> Integral Ethernet controller: et0, Ebus slot 11
> EPC external interrupts
> Integral SCSI controller 71: Version WD33C95A, differential, revision 0
> Integral SCSI controller 70: Version WD33C95A, single ended, revision 0
> Integral SCSI controller 1: Version WD33C95A, differential, revision 0
> Disk drive: unit 7 on SCSI controller 1
> Disk drive: unit 2 on SCSI controller 1
> Disk drive: unit 1 on SCSI controller 1
> Integral SCSI controller 0: Version WD33C95A, single ended, revision 0
> CDROM: unit 3 on SCSI controller 0
> Tape drive: unit 1 on SCSI controller 0: DAT
> CC synchronization join counter
> Integral EPC parallel port: Ebus slot 7
> Integral EPC parallel port: Ebus slot 11
> VME bus: adapter 0 mapped to adapter 45
> VME bus: adapter 45
>
> GFXINFO--->>>
> Graphics board 0 is "KONAS" graphics.
> Managed (":0.0") 3072x768
> Display has 8 channels
> 4 GEs (of 4), occmask = 0x0f
> 4MB external BEF ram, 32bit path
> 4 RM6 boards (of 4) 1/1/1/1
> Texture Memory: 64MB/64MB/64MB/64MB
> Medium pixel depth
> 32K cmap, 64K external gamma
> Channel 0:
> Origin = (0,0)
> Video Output: 1024 pixels, 768 lines, 60.00Hz (1024x768_60.vfo)
> Channel 1:
> Origin = (1024,0)
> Video Output: 1024 pixels, 768 lines, 60.00Hz (1024x768_60.vfo)
> Channel 2:
> Origin = (2048,0)
> Video Output: 1024 pixels, 768 lines, 60.00Hz (1024x768_60.vfo)
>
> Regards,
> Kenneth Kearney
> 516.346.6014, kearnke++at++mail.northgrum.com
> Northrop Grumman Corp
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-- 
"Only the mediocre are always at their best." -- Jean Giraudoux


For advanced 3D graphics Performer + OpenGL based examples and tutors:
http://www.dorbie.com/

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