Re: iR genlock problems

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Rob Jenkins (robj++at++quid)
Wed, 27 Nov 1996 17:44:36 -0800

On Nov 27, 4:35pm, Tinker, Peter wrote:
> Subject: iR genlock problems
> pfFrame complains that my pipes are not genlocked. I also complain about
> this, but noone seems to know exactly the right answer. I've asked all the
> gurus I know personally, and they insist I'm doing it right, but no go. Can
> anyone help? (SGI's been sitting on my support request for a week with no
> response).
>

I couldn't find the call, do you have the number ? I'll see what's happening on
it.

> Onyx
> 8 R4400 CPUs
> IRIX t.2
> 3 iR pipes (2 + 2 + 8 channels)
> OpenGL
> Performer 2.2
>
> I am using pipes 0 and 1 at 2++at++1280x1024_60 and pipe 2 at 8++at++640x480_60, but I
> have no better luck when all pipes are at 1280x1024++at++60.
>
> Pipe 0's vertical sync is cabled to Pipe 1's genlock in. Pipe 1's gelock out
> is cabled to Pipe 2's genlock in. Pipe 2's genlock out is terminated. A
> scope shows that Pipe 2's genlock out is getting a 60Hz pulse, as expected,
> i.e., no obvious signal problem through the pipes.
>
> Using ircombine, pipe 0's sync is set INTERNAL; pipe 1 and 2's syncs are set
> EXTERNAL.
>
> perfly -c 2
> gives a genlock warning on any and all combinations of pipes.
>

The first pipe you give for the -C option should be the master I think ( pipe 0
in the arrangement you describe above )

Does gfxinfo say the pipes are genlocked ?

Do you have patch 1355 ( that has some genlock fixes in I believe ).

If none of the above helps then lets get the support call moving as this isn't
the ideal forum then maybe post finding after it's sorted.

Cheers
Rob

-- 
________________________________________________________________
Rob Jenkins mailto:robj++at++csd.sgi.com
Silicon Graphics, Mtn View, California, USA
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