iR genlock problems

New Message Reply Date view Thread view Subject view Author view

Tinker, Peter (Tinker#m#_Peter++at++MSMAIL4.HAC.COM)
27 Nov 1996 16:35:17 -0800

pfFrame complains that my pipes are not genlocked. I also complain about
this, but noone seems to know exactly the right answer. I've asked all the
gurus I know personally, and they insist I'm doing it right, but no go. Can
anyone help? (SGI's been sitting on my support request for a week with no
response).

Onyx
8 R4400 CPUs
IRIX t.2
3 iR pipes (2 + 2 + 8 channels)
OpenGL
Performer 2.2

I am using pipes 0 and 1 at 2++at++1280x1024_60 and pipe 2 at 8++at++640x480_60, but I
have no better luck when all pipes are at 1280x1024++at++60.

Pipe 0's vertical sync is cabled to Pipe 1's genlock in. Pipe 1's gelock out
is cabled to Pipe 2's genlock in. Pipe 2's genlock out is terminated. A
scope shows that Pipe 2's genlock out is getting a 60Hz pulse, as expected,
i.e., no obvious signal problem through the pipes.

Using ircombine, pipe 0's sync is set INTERNAL; pipe 1 and 2's syncs are set
EXTERNAL.

perfly -c 2
gives a genlock warning on any and all combinations of pipes.

Please help. Millions of brain cells are in your hands.

- Pete Tinker
  Hughes Research Labs

=======================================================================
List Archives, FAQ, FTP: http://www.sgi.com/Technology/Performer/
            Submissions: info-performer++at++sgi.com
        Admin. requests: info-performer-request++at++sgi.com

New Message Reply Date view Thread view Subject view Author view

This archive was generated by hypermail 2.0b2 on Mon Aug 10 1998 - 17:54:01 PDT

This message has been cleansed for anti-spam protection. Replace '++at++' in any mail addresses with the '@' symbol.