| To: | "Grant Grundler" <iod00d@xxxxxx>, davem@xxxxxxxxxxxxx, mchan@xxxxxxxxxxxxxxxxxxxxxxx |
|---|---|
| Subject: | RE: OK if tg3_get_eeprom_hw_cfg() reads SRAM? |
| From: | "Michael Chan" <mchan@xxxxxxxxxxxx> |
| Date: | Thu, 18 Aug 2005 00:40:42 -0700 |
| Cc: | netdev@xxxxxxxxxxx |
| Sender: | netdev-bounce@xxxxxxxxxxx |
| Thread-index: | AcWjwNCBiVuH99ZnQYOLVzIAyjF/CgABlqZA |
| Thread-topic: | OK if tg3_get_eeprom_hw_cfg() reads SRAM? |
Grant Grundler wrote: > The comment before tg3_get_eeprom_hw_cfg() suggests tg3 > should ONLY be touching PCI cfg space until the NIC gets > to D0 power state. The comment is correct. In D3 power state, the chip will not respond to MMIO. When I did that patch, I made very sure that only config. cycles were used before switching to D0. > But tg3_get_eeprom_hw_cfg() is called before > tg3_set_power_state(tp,0). > Is it OK for tg3_get_eeprom_hw_cfg() to read > NIC_SRAM_DATA_CFG? Yes, NIC_SRAM_DATA_CFG is in memory space (as opposed to register space) and we always use config. cycles to read/write memory space. Please see tg3_read/write_mem(). |
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