| To: | "David S. Miller" <davem@xxxxxxxxxxxxx> |
|---|---|
| Subject: | Re: [PATCH]: Tigon3 new NAPI locking v2 |
| From: | Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx> |
| Date: | Thu, 16 Jun 2005 21:59:46 +1000 |
| Cc: | netdev@xxxxxxxxxxx, mchan@xxxxxxxxxxxx |
| In-reply-to: | <20050616113732.GA22367@xxxxxxxxxxxxxxxxxxx> |
| References: | <20050603.122558.88474819.davem@xxxxxxxxxxxxx> <20050616113732.GA22367@xxxxxxxxxxxxxxxxxxx> |
| Sender: | netdev-bounce@xxxxxxxxxxx |
| User-agent: | Mutt/1.5.9i |
On Thu, Jun 16, 2005 at 09:37:32PM +1000, herbert wrote: > > The advantage of this is that we won't have to rely on the interrupt > to occur after setting SYNC. The disadvantage is that on certain > architectures (sparc64 obviously :) we're now doing the relatively > expensive bit operations on each IRQ. Actually, why don't we utilise the existing synchronize_irq mechanism? Here is what we could do. -- Visit Openswan at http://www.openswan.org/ Email: Herbert Xu ~{PmV>HI~} <herbert@xxxxxxxxxxxxxxxxxxx> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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