| To: | "Manuel Perez Ayala" <mperaya@xxxxxxxxxxxxxxxx> |
|---|---|
| Subject: | Re: tg3 support broken on PPC, a workaround |
| From: | "Michael Chan" <mchan@xxxxxxxxxxxx> |
| Date: | Tue, 10 May 2005 09:52:46 -0700 |
| Cc: | netdev@xxxxxxxxxxx |
| In-reply-to: | <20050510113308.kbjo3ob1ck0404k8@xxxxxxxxxxxxx> |
| References: | <20050510113308.kbjo3ob1ck0404k8@xxxxxxxxxxxxx> |
| Sender: | netdev-bounce@xxxxxxxxxxx |
On Tue, 2005-05-10 at 11:33 +0200, Manuel Perez Ayala wrote: > > If I replace the 2.6.8 piece of code with the 2.6.7 one and compile the code, > it > seems to work without problems of data corruption. > Can you print out the value of tp->dma_rwctrl in hex just before it is written to the register in the line: tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl); Please do this for the working and non-working driver versions. I assume you have a 5700 or 5701 as this code that controls the DMA boundaries only affects those devices. Please confirm with the lspci output or tg3's probing output. In the new code, the DMA write bursts will disconnect at multiples of cache lines instead of 1 cache line. And DMA read bursts will not disconnect at cache line boundaries. |
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