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Re: Mystery packet killing tg3

To: Stephen Hemminger <shemminger@xxxxxxxx>
Subject: Re: Mystery packet killing tg3
From: Andi Kleen <ak@xxxxxx>
Date: 5 May 2005 20:01:06 +0200
Date: Thu, 5 May 2005 20:01:06 +0200
Cc: Peter Buckingham <peter@xxxxxxxxxxxx>, "David S. Miller" <davem@xxxxxxxxxxxxx>, jgarzik@xxxxxxxxx, netdev@xxxxxxxxxxx
In-reply-to: <427A47C9.6040302@xxxxxxxx>
References: <20050502162405.65dfb4a9@xxxxxxxxxxxxxxxxxxxxx> <20050502200251.38271b61.davem@xxxxxxxxxxxxx> <m14qdiyhcn.fsf@xxxxxx> <42791825.2080204@xxxxxxxxxxxx> <20050505114327.GA51761@xxxxxx> <427A47C9.6040302@xxxxxxxx>
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On Thu, May 05, 2005 at 09:20:25AM -0700, Stephen Hemminger wrote:
> Andi Kleen wrote:
> 
> >>>IOMMU code on x86-64 should be never active unless Stephen
> >>>used IOMMU_DEBUG or iommu=force.  THat is because the tg3
> >>>is a 64bit capable device and should always use bypass.
> >>>      
> >>>
> >>how is this detected? we have a board that is using a 32bit e1000 and we 
> >>have to use iommu=force otherwise it doesn't do the right thing with > 
> >>4GB of RAM.
> >>    
> >>
> >
> >"32bit e1000"? How did you get such a beast? AFAIK all e1000s are 64bit
> >address capable. Please supply a full boot log without iommu=force 
> >and describe what happens exactly.
> >  
> >
> One of the osdl e1000's in the lab is an IBM rebranded card that although
> it uses a 64bit slot, is really only 32bit

Ok, but it still supports DAC. The PCI bus width is a different
thing from the size of the address registers.

What we are talking about here is just if the card can directly
address physical memory above 4GB. What width the bus is 
is a hardware internal thing that we do not really care about
in the IOMMU code.

-Andi


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