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Re: [PATCH 2.6.11 2/8] tg3: flush status block in tg3_interrupt

To: "Michael Chan" <mchan@xxxxxxxxxxxx>
Subject: Re: [PATCH 2.6.11 2/8] tg3: flush status block in tg3_interrupt
From: "David S. Miller" <davem@xxxxxxxxxxxxx>
Date: Wed, 23 Mar 2005 11:07:00 -0800
Cc: netdev@xxxxxxxxxxx
In-reply-to: <B1508D50A0692F42B217C22C02D84972020F3E22@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
References: <B1508D50A0692F42B217C22C02D84972020F3E22@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
Sender: netdev-bounce@xxxxxxxxxxx
On Sun, 20 Mar 2005 23:26:26 -0800
"Michael Chan" <mchan@xxxxxxxxxxxx> wrote:

> Add register read of PCI state register in tg3_interrupt() if status block's
> updated bit is not set. This will flush the status block and confirm whether
> the interrupt is ours or not. PCI ordering rules allow the interrupt to
> arrive at the CPU ahead of the status block that may be posted at the
> chipset.
> 
> Signed-off-by: Michael Chan <mchan@xxxxxxxxxxxx>

Applied, thanks Michael.

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