On Sun, Dec 05, 2004 at 01:12:22PM -0800, Scott Feldman wrote:
> Would Martin or Lennert run these test for a longer duration so we can
> get some data, maybe adding in Rx. It could be that removing the Tx
> interrupts and descriptor write-backs, prefetching may be ok. I don't
> know. Intel?
What your patch does is (correct me if I'm wrong):
- Masking TXDW, effectively preventing it from delivering TXdone ints.
- Not setting E1000_TXD_CMD_IDE in the TXD command field, which causes
the chip to 'ignore the TIDV' register, which is the 'TX Interrupt
Delay Value'. What exactly does this?
- Not setting the "Report Packet Sent"/"Report Status" bits in the TXD
command field. Is this the equivalent of the TXdone interrupt?
Just exactly which bit avoids the descriptor writeback?
I'm also a bit worried that only freeing packets 1ms later will mess up
socket accounting and such. Any ideas on that?
> Also, wouldn't it be great if someone wrote a document capturing all of
> the accumulated knowledge for future generations?
I'll volunteer for that.
--L
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