[Top] [All Lists]

Re: [E1000-devel] Transmission limit

To: jamal <hadi@xxxxxxxxxx>
Subject: Re: [E1000-devel] Transmission limit
From: Lennert Buytenhek <buytenh@xxxxxxxxxxxxxx>
Date: Tue, 30 Nov 2004 14:46:00 +0100
Cc: Robert Olsson <Robert.Olsson@xxxxxxxxxxx>, P@xxxxxxxxxxxxxx, mellia@xxxxxxxxxxxxxxxxxxxx, e1000-devel@xxxxxxxxxxxxxxxxxxxxx, Jorge Manuel Finochietto <jorge.finochietto@xxxxxxxxx>, Giulio Galante <galante@xxxxxxxxx>, netdev@xxxxxxxxxxx
In-reply-to: <1101821501.1043.43.camel@xxxxxxxxxxxxxxxx>
References: <1101467291.24742.70.camel@xxxxxxxxxxxxxxxxxxxxxx> <41A73826.3000109@xxxxxxxxxxxxxx> <16807.20052.569125.686158@xxxxxxxxxxxx> <1101484740.24742.213.camel@xxxxxxxxxxxxxxxxxxxxxx> <41A76085.7000105@xxxxxxxxxxxxxx> <1101499285.1079.45.camel@xxxxxxxxxxxxxxxx> <16811.8052.678955.795327@xxxxxxxxxxxx> <1101821501.1043.43.camel@xxxxxxxxxxxxxxxx>
Sender: netdev-bounce@xxxxxxxxxxx
User-agent: Mutt/1.4.1i
On Tue, Nov 30, 2004 at 08:31:41AM -0500, jamal wrote:

> >  Also from what I understand new HW and MSI can help in the case where
> >  pass objects between CPU. Did I dream or did someone tell me that S2IO 
> >  could have several TX ring that could via MSI be routed to proper cpu?
> I am wondering if the per CPU tx/rx irqs are valuable at all. They sound
> like more hell to maintain.

On the TX path you'd have qdiscs to deal with as well, no?


<Prev in Thread] Current Thread [Next in Thread>