On Wed, Sep 15, 2004 at 02:36:25PM +0200, Robert Olsson wrote:
> Chip should be able to transfer 64 packets in single burst I don't now
> how set/verify this.
maybe this is what the E1000_TCTL_PBE flag in TXCTL and E1000_TBT
register are for?
I tried switching TCTL_PBE on, and played with different values of TBT
(0,1,255,65535) - however, no improvement in pps rate.
Maybe someone form intel could comment on this?
- Harald Welte <laforge@xxxxxxxxxxxxx> http://www.netfilter.org/
"Fragmentation is like classful addressing -- an interesting early
architectural error that shows how much experimentation was going
on while IP was being designed." -- Paul Vixie
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