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Re: Tigon3 5701 PCI-X recv performance problem

To: Jeff Garzik <jgarzik@xxxxxxxxx>
Subject: Re: Tigon3 5701 PCI-X recv performance problem
From: John Partridge <johnip@xxxxxxx>
Date: Wed, 03 Dec 2003 16:11:22 -0600
Cc: "David S. Miller" <davem@xxxxxxxxxx>, ak@xxxxxxx, netdev@xxxxxxxxxxx, jes@xxxxxxx
In-reply-to: <3FB15550.8020807@xxxxxxxxx>
References: <3F844578.40306@xxxxxxx> <20031008101046.376abc3b.davem@xxxxxxxxxx> <3F8455BE.8080300@xxxxxxx> <20031008183742.GA24822@xxxxxxxxxxxxx> <20031008122223.1ba5ac79.davem@xxxxxxxxxx> <20031008202248.GA15611@xxxxxxxxxxxxxxxx> <3F8702FF.70500@xxxxxxx> <20031010192036.GA31727@xxxxxxxxxxxxx> <3F8802E6.5030601@xxxxxxx> <20031011131921.GC21763@xxxxxxxxxxxxx> <20031011105054.0e16a607.davem@xxxxxxxxxx> <3F8C290A.3010508@xxxxxxx> <20031014095323.71c8b9fe.davem@xxxxxxxxxx> <3FB03A56.7000709@xxxxxxx> <20031110182911.2c5a121b.davem@xxxxxxxxxx> <3FB140E2.1070007@xxxxxxx> <20031111122403.2d7bcf28.davem@xxxxxxxxxx> <3FB153F1.8040708@xxxxxxx> <3FB15550.8020807@xxxxxxxxx>
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Jeff,

I have not seen the change for this go into 2.6 is there something else I 
should be
doing ?

Thanks
John

Jeff Garzik wrote:
John Partridge wrote:

David S. Miller wrote:

On Tue, 11 Nov 2003 14:04:50 -0600
Why are you depending upon MCKINLEY?  Don't all ia64 cpus
give traps for unaligned memory accesses?



I have no evidence of a problem with Itanium1, only on Itanium2 (MCKINLEY)
I have seen it on HP and SGI MCKINLEY



Ask the other David M about eepro100.c patches he wanted to send to me...

    Jeff




--
John Partridge

Silicon Graphics Inc
Tel:  651-683-3428
Vnet: 233-3428
E-Mail: johnip@xxxxxxx


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