Hi all,
I am done with those measurements, and the results are (average of 50 UDP
packets of 500 bytes, in bunch of 3 every 50 ms, the PC running X but no other
particularly demanding application):
from stage 0 to 1: 5.97 msec [eth driver to IP_input]
from stage 1 to 2: 1.26 msec [IP_input]
from stage 2 to 3: 1.75 msec [IP_input to UDP]
from stage 3 to 4: 12.83 msec [UDP to application]
---
Total: 21.75 ms
I have seen variations in those numbers, for example stage 3 to 4 taking over
50 ms in another instance of the test. I may rerun another quick test for
capturing maximum values (and variance?) at a later stage when I compare it to
a real-time patched kernel, probably for next week.
Technical detail of my implementation are:
* storing the 32 lower bits of the CPU clock register found in timex.h (this
is x586 specific and provides less than a usec precision without any particular
performance hit) in each UDP packets received on a particular port (hard coded
in the 3c59x.c, ip_input.c and udp.c)
* 'sleep(1)' and a custom rtc interrupt handler (from Rene) used by the
application to calibrate the number of CPU clock register ticks per second
I will package and release the whole code to anyone interested. Thanks to all
for your help and suggestions. I learnt quite a lot in doing that.
Guilhem.
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