Well in relation with that L2 abstractions discussion...
With the great improvement of softnet in 2.4, the drivers are responsible to get
scheduled, which is done more efficently by real hardware that generates
interrupts, than virtual shaping abstractions.(I don't know for other
pseudo devices such as tunnels, 802.1Q net_device, etc ?)
At least with the qdisc shapers platforms other than Intel (we use ARM) are
limited to get scheduled when new traffic arrives or at HZ frequency.
This gives _bad_ shaping resolution. Somebody here hacked another timer system
just for net/sched so that we don't have to play with HZ, which have more to do
with processes than softnet, IMHO (Am I wrong ?). So this guy created that
second timer system based on an interrupt that awake at a frequency of 10kHz.
We chose 10000Hz since at 100 Mbps (FastEth is a pretty standard/good interface
speed) datagrams with MTU of 1500 (*8bits/Byte = 12000 bits) would require
transmission at 8333 Hz. So we do better than MTU provisionning, and at
100Mbps, 10KHz, 1250 bytes (10kb) of smaller packet accumulates, which seem
an affordable burst size. And hey! this gives us a potential floor latency of
0.1 ms, which is much way greater than the earlier 10 ms at HZ a of 100.
Moreover on system with clockrate > 100MHz this gives > 10000 cycles for job to
get done between potential interruption, which seems ok.
Am I the only one thinking that softnet shaper scheduling share few in common
with regular (more user space oriented) timers ?
Is it a good idea to separate PSCHED_CLOCK_SOURCE from HZ on most platform and
how could it be implemented generally (instead of just for our particular
SA+21285) ?
Thanks
--
François Desloges
fd@xxxxxxxxxxxxx
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