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Total 14 documents matching your query.

1. Re: NAPI for eepro100 (score: 1): Author: Jeff Garzik <jgarzik@xxxxxxxxxxxxxxxx>; Date: Wed, 12 Jun 2002 19:00:00 -0400; Recently i've converted eepro100 driver to use napi,in order to improve network performance of my poor 150M mips machine. It does eliminate the interrupt live lock seen before,maintaining a peak thro; /archives/netdev/2002-06/msg00070.html (9,037 bytes)
2. Re: NAPI for eepro100 (score: 1): Author: "David S. Miller" <davem@xxxxxxxxxx>; Date: Wed, 12 Jun 2002 16:05:32 -0700 (PDT); No, it's worse than that. See how non-consistent memory is used by the eepro100 driver for descriptor bits? The skb->tail bits? That is very problematic.; /archives/netdev/2002-06/msg00071.html (8,057 bytes)
3. Re: NAPI for eepro100 (score: 1): Author: Jeff Garzik <jgarzik@xxxxxxxxxxxxxxxx>; Date: Wed, 12 Jun 2002 19:17:58 -0400; David S. Miller wrote: From: Jeff Garzik <jgarzik@xxxxxxxxxxxxxxxx> Date: Wed, 12 Jun 2002 19:00:00 -0400 for the 'mips' patch, it looks like the arch maintainer(s) need to fix the PCI DMA support...; /archives/netdev/2002-06/msg00072.html (9,142 bytes)
4. Re: NAPI for eepro100 (score: 1): Author: "David S. Miller" <davem@xxxxxxxxxx>; Date: Wed, 12 Jun 2002 16:33:44 -0700 (PDT); Oh crap, you're right... eepro100 in general does funky stuff with the way packets are handled, mainly due to the need to issue commands to the NIC engine instead of the normal per-descriptor owner b; /archives/netdev/2002-06/msg00073.html (8,341 bytes)
5. Re: NAPI for eepro100 (score: 1): Author: Donald Becker <becker@xxxxxxxxx>; Date: Wed, 12 Jun 2002 22:25:22 -0400 (EDT); The eepro100 has a unique design in many different aspects. With the current driver structure, yes, the descriptor words must be immediately before the packet data. You can use other Rx and Tx struct; /archives/netdev/2002-06/msg00075.html (8,745 bytes)
6. Re: NAPI for eepro100 (score: 1): Author: Andrey Savochkin <saw@xxxxxxxxxxxxx>; Date: Thu, 13 Jun 2002 12:57:53 +0400; What's the problem? If it isn't allowed to do, then what is the meaning of PCI_DMA_BIDIRECTIONAL mappings? Andrey; /archives/netdev/2002-06/msg00079.html (8,672 bytes)
7. Re: NAPI for eepro100 (score: 1): Author: "David S. Miller" <davem@xxxxxxxxxx>; Date: Thu, 13 Jun 2002 01:47:00 -0700 (PDT); What's the problem? If it isn't allowed to do, then what is the meaning of PCI_DMA_BIDIRECTIONAL mappings? It's slow. Not wrong, just inefficient. Descriptors were meant to be done using consistent; /archives/netdev/2002-06/msg00080.html (8,783 bytes)
8. Re: NAPI for eepro100 (score: 1): Author: Jeff Garzik <jgarzik@xxxxxxxxxxxxxxxx>; Date: Wed, 12 Jun 2002 19:00:00 -0400; Zhang Fuxin wrote: hi,all Recently i've converted eepro100 driver to use napi,in order to improve network performance of my poor 150M mips machine. It does eliminate the interrupt live lock seen befo; /archives/netdev/2002-06/msg00221.html (9,136 bytes)
9. Re: NAPI for eepro100 (score: 1): Author: "David S. Miller" <davem@xxxxxxxxxx>; Date: Wed, 12 Jun 2002 16:05:32 -0700 (PDT); No, it's worse than that. See how non-consistent memory is used by the eepro100 driver for descriptor bits? The skb->tail bits? That is very problematic.; /archives/netdev/2002-06/msg00222.html (8,157 bytes)
10. Re: NAPI for eepro100 (score: 1): Author: Jeff Garzik <jgarzik@xxxxxxxxxxxxxxxx>; Date: Wed, 12 Jun 2002 19:17:58 -0400; David S. Miller wrote: From: Jeff Garzik <jgarzik@xxxxxxxxxxxxxxxx> Date: Wed, 12 Jun 2002 19:00:00 -0400 for the 'mips' patch, it looks like the arch maintainer(s) need to fix the PCI DMA support...; /archives/netdev/2002-06/msg00223.html (9,281 bytes)
11. Re: NAPI for eepro100 (score: 1): Author: "David S. Miller" <davem@xxxxxxxxxx>; Date: Wed, 12 Jun 2002 16:33:44 -0700 (PDT); Oh crap, you're right... eepro100 in general does funky stuff with the way packets are handled, mainly due to the need to issue commands to the NIC engine instead of the normal per-descriptor owner b; /archives/netdev/2002-06/msg00224.html (8,452 bytes)
12. Re: NAPI for eepro100 (score: 1): Author: Donald Becker <becker@xxxxxxxxx>; Date: Wed, 12 Jun 2002 22:25:22 -0400 (EDT); The eepro100 has a unique design in many different aspects. With the current driver structure, yes, the descriptor words must be immediately before the packet data. You can use other Rx and Tx struct; /archives/netdev/2002-06/msg00226.html (8,798 bytes)
13. Re: NAPI for eepro100 (score: 1): Author: Andrey Savochkin <saw@xxxxxxxxxxxxx>; Date: Thu, 13 Jun 2002 12:57:53 +0400; What's the problem? If it isn't allowed to do, then what is the meaning of PCI_DMA_BIDIRECTIONAL mappings? Andrey; /archives/netdev/2002-06/msg00230.html (8,826 bytes)
14. Re: NAPI for eepro100 (score: 1): Author: "David S. Miller" <davem@xxxxxxxxxx>; Date: Thu, 13 Jun 2002 01:47:00 -0700 (PDT); What's the problem? If it isn't allowed to do, then what is the meaning of PCI_DMA_BIDIRECTIONAL mappings? It's slow. Not wrong, just inefficient. Descriptors were meant to be done using consistent; /archives/netdev/2002-06/msg00231.html (8,904 bytes)

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