Hi,
I'm a PhD student involved in research over VLIW arch., my team is
currently looking for a front/back-end compiler enough customizable to
be matched with the arch. of the processor we are going to develop
(Zelich arch.).
Does somebody have a felling on:
(1) "how easy" would be the re-targeting process?
(2) how good documented is the internal structure of the compiler?
(3) how it is right now, is it pretty stable or still buggy?
Thanks,
luigi
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____/ __ / ____/ / L u i g i G r a s s o
/ / / / / Research Assistant - PhD student
____/ ____/ ____/ / mailto:luigi.grasso@xxxxxxx
/ / / / http://diwww.epfl.ch/w3lap/
____/ _/ _/ ____/ Office: +41 -21 693 6703
Fax: +41 -21 693 5263
Laboratoire d'Architecture des Processeurs
IN F Ecublens, 1015 Lausanne, Switzerland
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