| To: | Michael Chan <mchan@xxxxxxxxxxxx> |
|---|---|
| Subject: | Re: [PATCH 2.6.11 5/8] tg3: Add unstable PLL workaround for 5750 |
| From: | Jeff Garzik <jgarzik@xxxxxxxxx> |
| Date: | Tue, 22 Mar 2005 15:58:19 -0500 |
| Cc: | "David S. Miller" <davem@xxxxxxxxxxxxx>, netdev@xxxxxxxxxxx |
| In-reply-to: | <B1508D50A0692F42B217C22C02D84972020F3E25@NT-IRVA-0741.brcm.ad.broadcom.com> |
| References: | <B1508D50A0692F42B217C22C02D84972020F3E25@NT-IRVA-0741.brcm.ad.broadcom.com> |
| Sender: | netdev-bounce@xxxxxxxxxxx |
| User-agent: | Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.7.3) Gecko/20040922 |
Michael Chan wrote:
Add unstable PLL clock workaround for 5750 Ax and Bx devices. The workaround code is run just before entering D3hot state.
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