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RE: [PATCH 2.6.12.1 5/12] S2io: Performance improvements

To: "'Christoph Hellwig'" <hch@xxxxxxxxxxxxx>, <raghavendra.koushik@xxxxxxxxxxxx>
Subject: RE: [PATCH 2.6.12.1 5/12] S2io: Performance improvements
From: "Leonid Grossman" <leonid.grossman@xxxxxxxxxxxx>
Date: Tue, 12 Jul 2005 13:56:55 -0700
Cc: <jgarzik@xxxxxxxxx>, <netdev@xxxxxxxxxxx>, <ravinandan.arakali@xxxxxxxxxxxx>, <rapuru.sriram@xxxxxxxxxxxx>
In-reply-to: <20050712202754.GA10768@infradead.org>
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> -----Original Message-----
> From: Christoph Hellwig [mailto:hch@xxxxxxxxxxxxx] 
> Sent: Tuesday, July 12, 2005 1:28 PM
> To: raghavendra.koushik@xxxxxxxxxxxx
> Cc: jgarzik@xxxxxxxxx; netdev@xxxxxxxxxxx; 
> ravinandan.arakali@xxxxxxxxxxxx; 
> leonid.grossman@xxxxxxxxxxxx; rapuru.sriram@xxxxxxxxxxxx
> Subject: Re: [PATCH 2.6.12.1 5/12] S2io: Performance improvements
> 
> > 3. Enable two-buffer mode(for Rx path) automatically for SGI
> >    systems. This improves Rx performance dramatically on 
> >    SGI systems.
> 
> > +/* Enable 2 buffer mode by default for SGI system */ #ifdef 
> > +CONFIG_IA64_SGI_SN2 #define CONFIG_2BUFF_MODE #endif
> 
> this enabled it only on kernel that are built to only run on 
> SN2 hardware, which is completely useless in practice.  
> Besides that defining a CONFIG_ symbol from source files is a 
> big no-go.
> 
> What exactly is the 2buff mode, and more specific what are 
> the downsides of  enabling it on non-SGI hardware?

In short, this is one of the ASIC modes where headers and payload are
separated by the hardware, and placed in separate receive buffers. (More
details are in the ASIC programming manual that is posted on ns1.s2io.com).
On SGI platforms, the two buffer mode results in a significant rx
performance boost since it allows to achieve both aligned transfers on the
bus and aligned data copies. 
It has been tested on Altix systems quite a bit (the card is OEMed and
shipped by SGI).
On other platforms, we haven't seen significant benefits from header
separation modes (unless they are combined with different features, which is
another story), and we decided not to introduce an extra bus transfer unless
it is clearly justified.
Also, the feature has not been sufficiently tested on other platforms,
For these reasons, it is left as a feature that's specific to SGI chipset -
but it is really beneficial there.

Leonid



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