Re: [E1000-devel] Transmission limit

[Lennert Buytenhek <buytenh@xxxxxxxxxxxxxx>]

On Fri, Dec 03, 2004 at 09:57:06PM +0100, Lennert Buytenhek wrote:

> > My problem is I only have a P4 desktop system with a 82544 nic running
> > at PCI 32/33Mhz, so I can't play with the big boys.  But, attached is a
> > rework of the Tx path to eliminate 1) Tx interrupts, and 2) Tx
> > descriptor write-backs.  For me, I see a nice jump in kpps, but I'd like
> > others to try with their setups.  We should be able to get to wire speed
> > with 60-byte packets.
> 
> Attached is a graph of my numbers with and without your patch for:
> - An 82540 at PCI 32/33, idle 33MHz card on the same bus forcing it to 33MHz.
> - An 82541 at PCI 32/66.
> - An 82546 at PCI-X 64/100, NIC can do 133MHz but mobo only does 100MHz.

When extrapolating these numbers to the 0-byte packet case (which then
tells you the per-packet overhead), I get the following approximate numbers:

case                            overhead 

phi-32-33-82540-2.6.9           1.86 us
phi-32-66-82541-2.6.9           1.41 us
phi-64-100-82546-2.6.9          1.45 us

phi-32-33-82540-2.6.9-feldman   1.48 us
phi-32-66-82541-2.6.9-feldman   1.13 us
phi-64-100-82546-2.6.9-feldman  1.25 us

Note that this figure doesn't differ all that much between the different
bus widths/speeds.

In any case, if I ever want to get more than ~880kpps on this hardware,
there's no other way than to make this overhead go down.  For saturating
1Gb/s with 60B packets on 64/100, the overhead can't be more than ~0.59 us
per packet or you lose.


--L