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Re: Tigon3 5701 PCI-X recv performance problem

To: johnip@xxxxxxx
Subject: Re: Tigon3 5701 PCI-X recv performance problem
From: "David S. Miller" <davem@xxxxxxxxxx>
Date: Tue, 11 Nov 2003 12:24:03 -0800
Cc: ak@xxxxxxx, netdev@xxxxxxxxxxx, jgarzik@xxxxxxxxx, jes@xxxxxxx
In-reply-to: <3FB140E2.1070007@sgi.com>
References: <3F844578.40306@sgi.com> <20031008101046.376abc3b.davem@redhat.com> <3F8455BE.8080300@sgi.com> <20031008183742.GA24822@wotan.suse.de> <20031008122223.1ba5ac79.davem@redhat.com> <20031008202248.GA15611@oldwotan.suse.de> <3F8702FF.70500@sgi.com> <20031010192036.GA31727@wotan.suse.de> <3F8802E6.5030601@sgi.com> <20031011131921.GC21763@wotan.suse.de> <20031011105054.0e16a607.davem@redhat.com> <3F8C290A.3010508@sgi.com> <20031014095323.71c8b9fe.davem@redhat.com> <3FB03A56.7000709@sgi.com> <20031110182911.2c5a121b.davem@redhat.com> <3FB140E2.1070007@sgi.com>
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On Tue, 11 Nov 2003 14:04:50 -0600
John Partridge <johnip@xxxxxxx> wrote:

> Is this OK ? I was not sure about the order should depends be beofre default 
> or
> the other way round ? or does it matter ? I suspect it does.

Why are you depending upon MCKINLEY?  Don't all ia64 cpus
give traps for unaligned memory accesses?

That is what this CONFIG option tells the whole kernel.


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