| To: | Steve Modica <modica@xxxxxxx> |
|---|---|
| Subject: | Re: Tigon3 5701 PCI-X recv performance problem |
| From: | "David S. Miller" <davem@xxxxxxxxxx> |
| Date: | Wed, 8 Oct 2003 11:29:57 -0700 |
| Cc: | johnip@xxxxxxx, netdev@xxxxxxxxxxx, jgarzik@xxxxxxxxx, jes@xxxxxxx |
| In-reply-to: | <3F8455BE.8080300@sgi.com> |
| References: | <3F844578.40306@sgi.com> <20031008101046.376abc3b.davem@redhat.com> <3F8455BE.8080300@sgi.com> |
| Sender: | netdev-bounce@xxxxxxxxxxx |
On Wed, 08 Oct 2003 13:21:50 -0500 Steve Modica <modica@xxxxxxx> wrote: > The problem is that on the Altix platform they have to deal with unaligned > accesses via an exception handler. You mean, ia64. Has anyone optimized the unaligned trap handler on ia64 (perhaps coding it in raw assembler) to see what the situation looks like then? Nobody wants to ever comment on this... > This extra memcpy when the buffer is not unaligned currently only impacts > 5701 But it affects all platforms, not just ones that ia64 which have the unaligned trap cost. For example, we _DEFINITELY_ don't want to do what your patch causes to happen on x86. |
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