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Re: Route cache performance under stress

To: sim@xxxxxxxxxxxxx
Subject: Re: Route cache performance under stress
From: "David S. Miller" <davem@xxxxxxxxxx>
Date: Thu, 22 May 2003 17:59:38 -0700 (PDT)
Cc: netdev@xxxxxxxxxxx, linux-net@xxxxxxxxxxxxxxx, kuznet@xxxxxxxxxxxxx
In-reply-to: <20030522114438.GD2961@netnation.com>
References: <20030522.015815.91322249.davem@redhat.com> <20030522.034058.71558626.davem@redhat.com> <20030522114438.GD2961@netnation.com>
Sender: netdev-bounce@xxxxxxxxxxx
   From: Simon Kirby <sim@xxxxxxxxxxxxx>
   Date: Thu, 22 May 2003 04:44:38 -0700
   
   There's no APIC on this test box, so it's using the XT-PIC.
   Production has an APIC, so I assume the overhead would be less
   there.

It is absolutely critical for routing throughput.  XT-PIC overhead
severely limits your maximum packets/second switching rate.

Another thing to watch out for are drivers still using PIO to
access device registers (3c59x comes to mind).

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