Hello!
> How many fragments are there in the typical tx packet?
2 or 3 for mtu=1500 (66% of two fragment and 33% of three fragment)
Well, you may count this assuming that header (ethernet +
ip + tcp/udp) is the first fragment, and payload consists of 4K pages.
> Are these machines
> with 64 bit / 66 MHz PCI, or just plain old 32 bit 33 MHz? If it's a 33
> MHz bus, the overhead for starting new PCI cycles to gather fragments
> could be maxing out the bandwidth. A PCI analyzer could be helpful =)
Yes, all the experimental data are about 32/33 pci.
Actually, it is not pci latency, but plain straight acenic bug.
F.e. e1000 does not have this overhead and reachs pps rates
at least twice more than acenic not straining muscles. 8)
>=5 usecs per dma transaction is something wicked,
but it is not a fatal flaw. At least, it should not be sensed
by TCP, it is parallel to software/protocol latencies and completely
hidden.
Alexey
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