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Re: More measurements

To: Andrew Morton <andrewm@xxxxxxxxxx>
Subject: Re: More measurements
From: "David S. Miller" <davem@xxxxxxxxxx>
Date: Tue, 30 Jan 2001 16:42:39 -0800 (PST)
Cc: Jes Sorensen <jes@xxxxxxxxxxxxx>, netdev@xxxxxxxxxxx
In-reply-to: <3A775E48.53BEA38A@uow.edu.au>
References: <3A75785A.42B9E7CE@uow.edu.au> <d3g0i04vb5.fsf@lxplus015.cern.ch> <3A775E48.53BEA38A@uow.edu.au>
Sender: owner-netdev@xxxxxxxxxxx
Andrew Morton writes:
 > I'm guessing that the major benefit of MMIO is posted
 > writes: getting the CPU off the memory bus quickly.

My vague recollection is:

1) Any old style IO flushes fifos in both directions
   in the path on the PCI bus to the device before
   the transaction is even started.

2) As mentioned, writes cannot be posted and thus
   the cpu must stall on completion.

A reading of the 2.1 PCI specs will show all of this
and show if my brain is working today or not :-)

Later,
David S. Miller
davem@xxxxxxxxxx

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