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Re: PCI violations? with o200 hardware - background

To: Leo Dagum <dagum@xxxxxxxxxxxxxxxxxxx>
Subject: Re: PCI violations? with o200 hardware - background
From: Ralf Baechle <ralf@xxxxxxxxxxx>
Date: Wed, 2 Feb 2000 23:03:08 +0100
Cc: bcasavan@xxxxxxxxxxxxxxxxxxxx, server1-plat@xxxxxxxxxxxxxxxxxxxx, Srinivasa Prasad Thirumalachar <sprasad@xxxxxxxxxxxxxxxxxxxx>, steiner@xxxxxxxxxxxxxxxxxxxx, linux-origin@xxxxxxxxxxx
In-reply-to: <10002020953.ZM17017@barrel.engr.sgi.com>
References: <200001141934.LAA22202@sprasad.engr.sgi.com> <10002020953.ZM17017@barrel.engr.sgi.com>
Sender: owner-linux-origin@xxxxxxxxxxx
On Wed, Feb 02, 2000 at 09:53:31AM -0800, Leo Dagum wrote:

>   Interrupt Signal Distribution
> 
>   There are two unique interrupt signals on each PCI bus.
>   The INTA# and INTC# signals
>   are wired together, and the INTB# and INTD# signals
>   are wired together. A PCI device
>   that uses two distinct signals must use
>   INTA and INTB, or INTC and INTD. A device
>   that needs more than two signals can use
>   the additional signal lines, but such a device
>   must also provide a register from which the device
>   driver can learn the cause of the interrupt.

The Linux PCI backend already knows about this, see ip27-pci.c.

I don't think it's a violation of the PCI specs.  The PCI specs only
say how the interrupts of PCI daughter busses are wired to their
parents, not to the host bus.  Even sharing of interrupts is mandatory
feature afaik.

  Ralf

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