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Update 2.6.x-xfs to 2.6.23-rc4.

Also update fs/xfs with external mainline changes.
There were 12 such missing commits that I detected:

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commit ad690ef9e690f6c31f7d310b09ef1314bcec9033
Author: Al Viro <viro@ftp.linux.org.uk>
    xfs ioctl __user annotations

commit 20c2df83d25c6a95affe6157a4c9cac4cf5ffaac
Author: Paul Mundt <lethal@linux-sh.org>
    mm: Remove slab destructors from kmem_cache_create().

commit d0217ac04ca6591841e5665f518e38064f4e65bd
Author: Nick Piggin <npiggin@suse.de>
    mm: fault feedback #1

commit 54cb8821de07f2ffcd28c380ce9b93d5784b40d7
Author: Nick Piggin <npiggin@suse.de>
    mm: merge populate and nopage into fault (fixes nonlinear)

commit d00806b183152af6d24f46f0c33f14162ca1262a
Author: Nick Piggin <npiggin@suse.de>
    mm: fix fault vs invalidate race for linear mappings

commit a569425512253992cc64ebf8b6d00a62f986db3e
Author: Christoph Hellwig <hch@infradead.org>
    knfsd: exportfs: add exportfs.h header

commit 831441862956fffa17b9801db37e6ea1650b0f69
Author: Rafael J. Wysocki <rjw@sisk.pl>
    Freezer: make kernel threads nonfreezable by default

commit 8e1f936b73150f5095448a0fee6d4f30a1f9001d
Author: Rusty Russell <rusty@rustcorp.com.au>
    mm: clean up and kernelify shrinker registration

commit 5ffc4ef45b3b0a57872f631b4e4ceb8ace0d7496
Author: Jens Axboe <jens.axboe@oracle.com>
    sendfile: remove .sendfile from filesystems that use generic_file_sendfile()

commit 8bb7844286fb8c9fce6f65d8288aeb09d03a5e0d
Author: Rafael J. Wysocki <rjw@sisk.pl>
    Add suspend-related notifications for CPU hotplug

commit 59c51591a0ac7568824f541f57de967e88adaa07
Author: Michael Opdenacker <michael@free-electrons.com>
    Fix occurrences of "the the "

commit 0ceb331433e8aad9c5f441a965d7c681f8b9046f
Author: Dmitriy Monakhov <dmonakhov@openvz.org>
    mm: move common segment checks to separate helper function
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Merge of 2.6.x-xfs-melb:linux:29656b by kenmcd.

Kernel driver f71805f
=====================

Supported chips:
  * Fintek F71805F/FG
    Prefix: 'f71805f'
    Addresses scanned: none, address read from Super I/O config space
    Datasheet: Available from the Fintek website
  * Fintek F71872F/FG
    Prefix: 'f71872f'
    Addresses scanned: none, address read from Super I/O config space
    Datasheet: Available from the Fintek website

Author: Jean Delvare <khali@linux-fr.org>

Thanks to Denis Kieft from Barracuda Networks for the donation of a
test system (custom Jetway K8M8MS motherboard, with CPU and RAM) and
for providing initial documentation.

Thanks to Kris Chen and Aaron Huang from Fintek for answering technical
questions and providing additional documentation.

Thanks to Chris Lin from Jetway for providing wiring schematics and
answering technical questions.


Description
-----------

The Fintek F71805F/FG Super I/O chip includes complete hardware monitoring
capabilities. It can monitor up to 9 voltages (counting its own power
source), 3 fans and 3 temperature sensors.

This chip also has fan controlling features, using either DC or PWM, in
three different modes (one manual, two automatic).

The Fintek F71872F/FG Super I/O chip is almost the same, with two
additional internal voltages monitored (VSB and battery). It also features
6 VID inputs. The VID inputs are not yet supported by this driver.

The driver assumes that no more than one chip is present, which seems
reasonable.


Voltage Monitoring
------------------

Voltages are sampled by an 8-bit ADC with a LSB of 8 mV. The supported
range is thus from 0 to 2.040 V. Voltage values outside of this range
need external resistors. An exception is in0, which is used to monitor
the chip's own power source (+3.3V), and is divided internally by a
factor 2. For the F71872F/FG, in9 (VSB) and in10 (battery) are also
divided internally by a factor 2.

The two LSB of the voltage limit registers are not used (always 0), so
you can only set the limits in steps of 32 mV (before scaling).

The wirings and resistor values suggested by Fintek are as follow:

        pin                                           expected
        name    use           R1      R2     divider  raw val.

in0     VCC     VCC3.3V     int.    int.        2.00    1.65 V
in1     VIN1    VTT1.2V      10K       -        1.00    1.20 V
in2     VIN2    VRAM        100K    100K        2.00   ~1.25 V (1)
in3     VIN3    VCHIPSET     47K    100K        1.47    2.24 V (2)
in4     VIN4    VCC5V       200K     47K        5.25    0.95 V
in5     VIN5    +12V        200K     20K       11.00    1.05 V
in6     VIN6    VCC1.5V      10K       -        1.00    1.50 V
in7     VIN7    VCORE        10K       -        1.00   ~1.40 V (1)
in8     VIN8    VSB5V       200K     47K        1.00    0.95 V
in10    VSB     VSB3.3V     int.    int.        2.00    1.65 V (3)
in9     VBAT    VBATTERY    int.    int.        2.00    1.50 V (3)

(1) Depends on your hardware setup.
(2) Obviously not correct, swapping R1 and R2 would make more sense.
(3) F71872F/FG only.

These values can be used as hints at best, as motherboard manufacturers
are free to use a completely different setup. As a matter of fact, the
Jetway K8M8MS uses a significantly different setup. You will have to
find out documentation about your own motherboard, and edit sensors.conf
accordingly.

Each voltage measured has associated low and high limits, each of which
triggers an alarm when crossed.


Fan Monitoring
--------------

Fan rotation speeds are reported as 12-bit values from a gated clock
signal. Speeds down to 366 RPM can be measured. There is no theoretical
high limit, but values over 6000 RPM seem to cause problem. The effective
resolution is much lower than you would expect, the step between different
register values being 10 rather than 1.

The chip assumes 2 pulse-per-revolution fans.

An alarm is triggered if the rotation speed drops below a programmable
limit or is too low to be measured.


Temperature Monitoring
----------------------

Temperatures are reported in degrees Celsius. Each temperature measured
has a high limit, those crossing triggers an alarm. There is an associated
hysteresis value, below which the temperature has to drop before the
alarm is cleared.

All temperature channels are external, there is no embedded temperature
sensor. Each channel can be used for connecting either a thermal diode
or a thermistor. The driver reports the currently selected mode, but
doesn't allow changing it. In theory, the BIOS should have configured
everything properly.


Fan Control
-----------

Both PWM (pulse-width modulation) and DC fan speed control methods are
supported. The right one to use depends on external circuitry on the
motherboard, so the driver assumes that the BIOS set the method
properly. The driver will report the method, but won't let you change
it.

When the PWM method is used, you can select the operating frequency,
from 187.5 kHz (default) to 31 Hz. The best frequency depends on the
fan model. As a rule of thumb, lower frequencies seem to give better
control, but may generate annoying high-pitch noise. So a frequency just
above the audible range, such as 25 kHz, may be a good choice; if this
doesn't give you good linear control, try reducing it. Fintek recommends
not going below 1 kHz, as the fan tachometers get confused by lower
frequencies as well.

When the DC method is used, Fintek recommends not going below 5 V, which
corresponds to a pwm value of 106 for the driver. The driver doesn't
enforce this limit though.

Three different fan control modes are supported; the mode number is written
to the pwm<n>_enable file.

* 1: Manual mode
  You ask for a specific PWM duty cycle or DC voltage by writing to the
  pwm<n> file.

* 2: Temperature mode
  You define 3 temperature/fan speed trip points using the
  pwm<n>_auto_point<m>_temp and _fan files. These define a staircase
  relationship between temperature and fan speed with two additional points
  interpolated between the values that you define. When the temperature
  is below auto_point1_temp the fan is switched off.

* 3: Fan speed mode
  You ask for a specific fan speed by writing to the fan<n>_target file.

Both of the automatic modes require that pwm1 corresponds to fan1, pwm2 to
fan2 and pwm3 to fan3. Temperature mode also requires that temp1 corresponds
to pwm1 and fan1, etc.