pro64-support
[Top] [All Lists]

Re: Software pipelining

To: raya <raya@xxxxxxxxxxxxxxxxxxxxx>
Subject: Re: Software pipelining
From: Matthew McNaughton <mcnaught@xxxxxxxxxxxxxx>
Date: Mon, 19 Mar 2001 11:01:51 -0700 (MST)
Cc: pro64 <pro64-support@xxxxxxxxxxx>
In-reply-to: <3AB5CA81.42C09D3F@xxxxxxxxxxxxxxxxxxxxx>
Sender: owner-pro64-support@xxxxxxxxxxx
On Mon, 19 Mar 2001, raya wrote:

>   for (i =0;i<100;i++)
>     {
>       a[i] = b[i] + 5;
>     }
> }
> 
> Compiling with -O2 produced the following pipelined loop:
>  {       .mii
>  (p19) st4 [r3]=r35,4           // [3*II+0]  id:12 a+0x0
>  (p18) adds r34=5,r37           // [2*II+0]
>  (p18) nop.i 0                  // [2*II+0]
>  }; {       .mfb
>  (p16) ld4 r35=[r2],4           // [0*II+0]  id:11 b+0x0
>  (p16) nop.f 0                  // [0*II+0]
>        br.ctop.dptk.few .Lt_0_4 ;; // [3*II+0]
>  };
> 
> 
> Is this a  legal code? there is a store from r35 and load to r35 within
> the same instruction group.

Notice also how r37 is used and never defined. And where did the
predicates (p19), (p18), (p16) come from?

The ia64's "br.ctop" instruction renames (some) of the registers and
sets these predicates for software pipelining.

Here is a fine presentation on the topic:

http://www.cs.ualberta.ca/~amaral/courses/680/webslides/TA-HWSupSoftPipeline/sld001.htm

-- 
Matthew McNaughton <mcnaught@xxxxxxxxxxxxxx>


<Prev in Thread] Current Thread [Next in Thread>