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Re: [PATCH]: Tigon3 new NAPI locking v2

To: herbert@xxxxxxxxxxxxxxxxxxx
Subject: Re: [PATCH]: Tigon3 new NAPI locking v2
From: "David S. Miller" <davem@xxxxxxxxxxxxx>
Date: Thu, 16 Jun 2005 13:04:17 -0700 (PDT)
Cc: netdev@xxxxxxxxxxx, mchan@xxxxxxxxxxxx
In-reply-to: <20050616130453.GA23682@xxxxxxxxxxxxxxxxxxx>
References: <20050616113732.GA22367@xxxxxxxxxxxxxxxxxxx> <20050616115945.GA23064@xxxxxxxxxxxxxxxxxxx> <20050616130453.GA23682@xxxxxxxxxxxxxxxxxxx>
Sender: netdev-bounce@xxxxxxxxxxx
From: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
Subject: Re: [PATCH]: Tigon3 new NAPI locking v2
Date: Thu, 16 Jun 2005 23:04:53 +1000

> On Thu, Jun 16, 2005 at 09:59:45PM +1000, herbert wrote:
> > 
> > Actually, why don't we utilise the existing synchronize_irq mechanism?
> > Here is what we could do.
> 
> Oops, I should've left the smp_mb() in tg3_irq_quiesce since
> synchronize_irq isn't a memory barrier.

Wow, that's a very cool idea.  :-)

In fact, I think it will eliminate some (but definitely not all) of
the races that the new locking code has.

When you posted the patch with the atomic bitop added to the interrupt
handler, I was going to tell you that the whole idea was to make it
near zero cost to the interrupt fast path. :)

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