On Sat, 19 Feb 2005 05:10:07 +0100
Lennert Buytenhek <buytenh@xxxxxxxxxxxxxx> wrote:
> On Fri, Feb 18, 2005 at 10:44:45PM -0500, Jeff Garzik wrote:
> > Intel plans to sidestep the need for separate TOE cards by building this
> > technology into its server processor package - the chip itself, chipset
> > and network controller. This should reduce some of the time a processor
> > typically spends waiting for memory to feed back information and improve
> > overall application processing speeds.
> I wonder if they could just take the network processing circuitry from
> the IXP2800 (an extra 16-core (!) RISCy processor on-die, dedicated to
> doing just network stuff, and a 10gbps pipe going straight into the CPU
> itself) and graft it onto the Xeon.
> Now _that_ would be something worth experiencing.
No, that would be garbage.
Read what they are doing. The idea is not to have all of this network
protocol logic off-cpu, the idea is to "reduce some of the time
a processor typically spends waiting for memory to feed back information"
Think about what part of the network I/O equation that is working on.
It's not protocol offload, that's for sure.