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Re: [E1000-devel] Transmission limit

To: "David S. Miller" <davem@xxxxxxxxxxxxx>
Subject: Re: [E1000-devel] Transmission limit
From: Robert Olsson <Robert.Olsson@xxxxxxxxxxx>
Date: Wed, 1 Dec 2004 17:47:24 +0100
Cc: Robert Olsson <Robert.Olsson@xxxxxxxxxxx>, hadi@xxxxxxxxxx, P@xxxxxxxxxxxxxx, mellia@xxxxxxxxxxxxxxxxxxxx, e1000-devel@xxxxxxxxxxxxxxxxxxxxx, jorge.finochietto@xxxxxxxxx, galante@xxxxxxxxx, netdev@xxxxxxxxxxx
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David S. Miller writes:

 > >  Did I dream or did someone tell me that S2IO 
 > >  could have several TX ring that could via MSI be routed to proper cpu?
 > One of Sun's gigabit chips can do this too, except it isn't
 > via MSI, the driver has to read the descriptor to figure out
 > which cpu gets the software interrupt to process the packet.
 > SGI had hardware which allowed you to do this kind of stuff too.
 > Obviously the MSI version works much better.
 > It is important, the cpu selection process.  First of all, it must
 > be calculated such that flows always go through the same cpu.
 > Otherwise TCP sockets bounce between the cpus for a streaming
 > transfer.
 > And even this doesn't avoid all such problems, TCP LISTEN state
 > sockets will still thrash between the cpus with such a "pick
 > a cpu based upon" flow scheme.
 > Anyways, just some thoughts.

 Thanks for the the info. Well we'll be forced to get into those problems when
 the HW is capable. I'll guess it will be w. the 10 GIGE cards.


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