Index: sis900.c =================================================================== --- sis900.c (revision 13) +++ sis900.c (working copy) @@ -120,6 +120,7 @@ } mii_chip_table[] = { { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, + { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, { "ICS LAN PHY", 0x0015, 0xF440, LAN }, @@ -1903,8 +1904,41 @@ strcpy (info->bus_info, pci_name(sis_priv->pci_dev)); } +static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) +{ + struct sis900_private *sis_priv = net_dev->priv; + long ioaddr = net_dev->base_addr; + u32 cfgpmcsr; + + if (wol->wolopts & WAKE_MAGIC) { + pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); + cfgpmcsr |= PME_EN; + pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); + outl(inl(ioaddr + pmctrl) | MAGICPKT | ALGORITHM, ioaddr + pmctrl); + } else if (wol->wolopts) { + return -EINVAL; + } else { + pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); + cfgpmcsr |= ~PME_EN; + pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); + outl(inl(ioaddr + pmctrl) & ~MAGICPKT, ioaddr + pmctrl); + } + + return 0; +} + +static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) +{ + long ioaddr = net_dev->base_addr; + + if (inl(ioaddr + pmctrl) & MAGICPKT, ioaddr + pmctrl) + wol->wolopts |= WAKE_MAGIC; +} + static struct ethtool_ops sis900_ethtool_ops = { .get_drvinfo = sis900_get_drvinfo, + .get_wol = sis900_get_wol, + .set_wol = sis900_set_wol, }; /** Index: sis900.h =================================================================== --- sis900.h (revision 13) +++ sis900.h (working copy) @@ -140,6 +140,25 @@ EEREQ = 0x00000400, EEDONE = 0x00000200, EEGNT = 0x00000100 }; +/* Wake-on-LAN support. */ +enum sis900_power_management_control_register_bits { + LINKLOSS = 0x00000001, + LINKON = 0x00000002, + MAGICPKT = 0x00000400, + ALGORITHM = 0x00000800, + FRM1EN = 0x00100000, + FRM2EN = 0x00200000, + FRM3EN = 0x00400000, + FRM1ACS = 0x01000000, + FRM2ACS = 0x02000000, + FRM3ACS = 0x04000000, + WAKEALL = 0x40000000, + GATECLK = 0x80000000 +}; + +#define CFGPMCSR 0x44 +#define PME_EN 0x100 + /* Management Data I/O (mdio) frame */ #define MIIread 0x6000 #define MIIwrite 0x5002