/* * Cryptographic API. * * Support for VIA PadLock hardware crypto engine. * * Linux developers: * Michal Ludvig * * Key expansion routine taken from crypto/aes.c * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * --------------------------------------------------------------------------- * Copyright (c) 2002, Dr Brian Gladman , Worcester, UK. * All rights reserved. * * LICENSE TERMS * * The free distribution and use of this software in both source and binary * form is allowed (with or without changes) provided that: * * 1. distributions of this source code include the above copyright * notice, this list of conditions and the following disclaimer; * * 2. distributions in binary form include the above copyright * notice, this list of conditions and the following disclaimer * in the documentation and/or other associated materials; * * 3. the copyright holder's name is not used to endorse products * built using this software without specific written permission. * * ALTERNATIVELY, provided that this notice is retained in full, this product * may be distributed under the terms of the GNU General Public License (GPL), * in which case the provisions of the GPL apply INSTEAD OF those given above. * * DISCLAIMER * * This software is provided 'as is' with no explicit or implied warranties * in respect of its properties, including, but not limited to, correctness * and/or fitness for purpose. * --------------------------------------------------------------------------- */ #include #include #include #include #include #include #include #include #include "padlock.h" #include "../crypto_def.h" #include "../acrypto.h" #include "../crypto_stat.h" static inline int aes_hw_extkey_available (u8 key_len); static inline u32 generic_rotr32 (const u32 x, const unsigned bits) { const unsigned n = bits % 32; return (x >> n) | (x << (32 - n)); } static inline u32 generic_rotl32 (const u32 x, const unsigned bits) { const unsigned n = bits % 32; return (x << n) | (x >> (32 - n)); } #define rotl generic_rotl32 #define rotr generic_rotr32 /* * #define byte(x, nr) ((unsigned char)((x) >> (nr*8))) */ inline static u8 byte(const u32 x, const unsigned n) { return x >> (n << 3); } #define u32_in(x) le32_to_cpu(*(const u32 *)(x)) #define u32_out(to, from) (*(u32 *)(to) = cpu_to_le32(from)) static u8 pow_tab[256]; static u8 log_tab[256]; static u8 sbx_tab[256]; static u8 isb_tab[256]; static u32 rco_tab[10]; static u32 ft_tab[4][256]; static u32 it_tab[4][256]; static u32 fl_tab[4][256]; static u32 il_tab[4][256]; static inline u8 f_mult (u8 a, u8 b) { u8 aa = log_tab[a], cc = aa + log_tab[b]; return pow_tab[cc + (cc < aa ? 1 : 0)]; } #define ff_mult(a,b) (a && b ? f_mult(a, b) : 0) #define f_rn(bo, bi, n, k) \ bo[n] = ft_tab[0][byte(bi[n],0)] ^ \ ft_tab[1][byte(bi[(n + 1) & 3],1)] ^ \ ft_tab[2][byte(bi[(n + 2) & 3],2)] ^ \ ft_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n) #define i_rn(bo, bi, n, k) \ bo[n] = it_tab[0][byte(bi[n],0)] ^ \ it_tab[1][byte(bi[(n + 3) & 3],1)] ^ \ it_tab[2][byte(bi[(n + 2) & 3],2)] ^ \ it_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n) #define ls_box(x) \ ( fl_tab[0][byte(x, 0)] ^ \ fl_tab[1][byte(x, 1)] ^ \ fl_tab[2][byte(x, 2)] ^ \ fl_tab[3][byte(x, 3)] ) #define f_rl(bo, bi, n, k) \ bo[n] = fl_tab[0][byte(bi[n],0)] ^ \ fl_tab[1][byte(bi[(n + 1) & 3],1)] ^ \ fl_tab[2][byte(bi[(n + 2) & 3],2)] ^ \ fl_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n) #define i_rl(bo, bi, n, k) \ bo[n] = il_tab[0][byte(bi[n],0)] ^ \ il_tab[1][byte(bi[(n + 3) & 3],1)] ^ \ il_tab[2][byte(bi[(n + 2) & 3],2)] ^ \ il_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n) static void gen_tabs (void) { u32 i, t; u8 p, q; /* log and power tables for GF(2**8) finite field with 0x011b as modular polynomial - the simplest prmitive root is 0x03, used here to generate the tables */ for (i = 0, p = 1; i < 256; ++i) { pow_tab[i] = (u8) p; log_tab[p] = (u8) i; p ^= (p << 1) ^ (p & 0x80 ? 0x01b : 0); } log_tab[1] = 0; for (i = 0, p = 1; i < 10; ++i) { rco_tab[i] = p; p = (p << 1) ^ (p & 0x80 ? 0x01b : 0); } for (i = 0; i < 256; ++i) { p = (i ? pow_tab[255 - log_tab[i]] : 0); q = ((p >> 7) | (p << 1)) ^ ((p >> 6) | (p << 2)); p ^= 0x63 ^ q ^ ((q >> 6) | (q << 2)); sbx_tab[i] = p; isb_tab[p] = (u8) i; } for (i = 0; i < 256; ++i) { p = sbx_tab[i]; t = p; fl_tab[0][i] = t; fl_tab[1][i] = rotl (t, 8); fl_tab[2][i] = rotl (t, 16); fl_tab[3][i] = rotl (t, 24); t = ((u32) ff_mult (2, p)) | ((u32) p << 8) | ((u32) p << 16) | ((u32) ff_mult (3, p) << 24); ft_tab[0][i] = t; ft_tab[1][i] = rotl (t, 8); ft_tab[2][i] = rotl (t, 16); ft_tab[3][i] = rotl (t, 24); p = isb_tab[i]; t = p; il_tab[0][i] = t; il_tab[1][i] = rotl (t, 8); il_tab[2][i] = rotl (t, 16); il_tab[3][i] = rotl (t, 24); t = ((u32) ff_mult (14, p)) | ((u32) ff_mult (9, p) << 8) | ((u32) ff_mult (13, p) << 16) | ((u32) ff_mult (11, p) << 24); it_tab[0][i] = t; it_tab[1][i] = rotl (t, 8); it_tab[2][i] = rotl (t, 16); it_tab[3][i] = rotl (t, 24); } } #define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b) #define imix_col(y,x) \ u = star_x(x); \ v = star_x(u); \ w = star_x(v); \ t = w ^ (x); \ (y) = u ^ v ^ w; \ (y) ^= rotr(u ^ t, 8) ^ \ rotr(v ^ t, 16) ^ \ rotr(t,24) /* initialise the key schedule from the user supplied key */ #define loop4(i) \ { t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \ t ^= E_KEY[4 * i]; E_KEY[4 * i + 4] = t; \ t ^= E_KEY[4 * i + 1]; E_KEY[4 * i + 5] = t; \ t ^= E_KEY[4 * i + 2]; E_KEY[4 * i + 6] = t; \ t ^= E_KEY[4 * i + 3]; E_KEY[4 * i + 7] = t; \ } #define loop6(i) \ { t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \ t ^= E_KEY[6 * i]; E_KEY[6 * i + 6] = t; \ t ^= E_KEY[6 * i + 1]; E_KEY[6 * i + 7] = t; \ t ^= E_KEY[6 * i + 2]; E_KEY[6 * i + 8] = t; \ t ^= E_KEY[6 * i + 3]; E_KEY[6 * i + 9] = t; \ t ^= E_KEY[6 * i + 4]; E_KEY[6 * i + 10] = t; \ t ^= E_KEY[6 * i + 5]; E_KEY[6 * i + 11] = t; \ } #define loop8(i) \ { t = rotr(t, 8); ; t = ls_box(t) ^ rco_tab[i]; \ t ^= E_KEY[8 * i]; E_KEY[8 * i + 8] = t; \ t ^= E_KEY[8 * i + 1]; E_KEY[8 * i + 9] = t; \ t ^= E_KEY[8 * i + 2]; E_KEY[8 * i + 10] = t; \ t ^= E_KEY[8 * i + 3]; E_KEY[8 * i + 11] = t; \ t = E_KEY[8 * i + 4] ^ ls_box(t); \ E_KEY[8 * i + 12] = t; \ t ^= E_KEY[8 * i + 5]; E_KEY[8 * i + 13] = t; \ t ^= E_KEY[8 * i + 6]; E_KEY[8 * i + 14] = t; \ t ^= E_KEY[8 * i + 7]; E_KEY[8 * i + 15] = t; \ } static int aes_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len) { struct aes_ctx *ctx = ctx_arg; u32 i, t, u, v, w; u32 P[AES_EXTENDED_KEY_SIZE]; u32 rounds; if (key_len != 16 && key_len != 24 && key_len != 32) { return -EINVAL; } ctx->key_length = key_len; ctx->E = ctx->e_data; ctx->D = ctx->d_data; /* Ensure 16-Bytes alignmentation of keys for VIA PadLock. */ if ((int)(ctx->e_data) & 0x0F) ctx->E += 4 - (((int)(ctx->e_data) & 0x0F) / sizeof (ctx->e_data[0])); if ((int)(ctx->d_data) & 0x0F) ctx->D += 4 - (((int)(ctx->d_data) & 0x0F) / sizeof (ctx->d_data[0])); E_KEY[0] = u32_in (in_key); E_KEY[1] = u32_in (in_key + 4); E_KEY[2] = u32_in (in_key + 8); E_KEY[3] = u32_in (in_key + 12); /* Don't generate extended keys if the hardware can do it. */ if (aes_hw_extkey_available(key_len)) return 0; switch (key_len) { case 16: t = E_KEY[3]; for (i = 0; i < 10; ++i) loop4 (i); break; case 24: E_KEY[4] = u32_in (in_key + 16); t = E_KEY[5] = u32_in (in_key + 20); for (i = 0; i < 8; ++i) loop6 (i); break; case 32: E_KEY[4] = u32_in (in_key + 16); E_KEY[5] = u32_in (in_key + 20); E_KEY[6] = u32_in (in_key + 24); t = E_KEY[7] = u32_in (in_key + 28); for (i = 0; i < 7; ++i) loop8 (i); break; } D_KEY[0] = E_KEY[0]; D_KEY[1] = E_KEY[1]; D_KEY[2] = E_KEY[2]; D_KEY[3] = E_KEY[3]; for (i = 4; i < key_len + 24; ++i) { imix_col (D_KEY[i], E_KEY[i]); } /* PadLock needs a different format of the decryption key. */ rounds = 10 + (key_len - 16) / 4; for (i = 0; i < rounds; i++) { P[((i + 1) * 4) + 0] = D_KEY[((rounds - i - 1) * 4) + 0]; P[((i + 1) * 4) + 1] = D_KEY[((rounds - i - 1) * 4) + 1]; P[((i + 1) * 4) + 2] = D_KEY[((rounds - i - 1) * 4) + 2]; P[((i + 1) * 4) + 3] = D_KEY[((rounds - i - 1) * 4) + 3]; } P[0] = E_KEY[(rounds * 4) + 0]; P[1] = E_KEY[(rounds * 4) + 1]; P[2] = E_KEY[(rounds * 4) + 2]; P[3] = E_KEY[(rounds * 4) + 3]; memcpy(D_KEY, P, AES_EXTENDED_KEY_SIZE_B); return 0; } /* Tells whether the ACE is capable to generate the extended key for a given key_len. */ static inline int aes_hw_extkey_available(u8 key_len) { /* TODO: We should check the actual CPU model/stepping as it's likely that the capability will be added in the next CPU revisions. */ if (key_len == 16) return 1; return 0; } static void aes_padlock(void *ctx_arg, u8 *out_arg, const u8 *in_arg, const u8 *iv_arg, size_t nbytes, int encdec, int mode) { struct aes_ctx *ctx = ctx_arg; char bigbuf[sizeof(union cword) + 16]; union cword *cword; void *key; if (((long)bigbuf) & 0x0F) cword = (void*)(bigbuf + 16 - ((long)bigbuf & 0x0F)); else cword = (void*)bigbuf; /* Prepare Control word. */ memset (cword, 0, sizeof(union cword)); cword->b.encdec = !encdec; /* in the rest of cryptoapi ENC=1/DEC=0 */ cword->b.rounds = 10 + (ctx->key_length - 16) / 4; cword->b.ksize = (ctx->key_length - 16) / 8; /* Is the hardware capable to generate the extended key? */ if (!aes_hw_extkey_available(ctx->key_length)) cword->b.keygen = 1; /* ctx->E starts with a plain key - if the hardware is capable to generate the extended key itself we must supply the plain key for both Encryption and Decryption. */ if (encdec == CRYPTO_OP_ENCRYPT || cword->b.keygen == 0) key = ctx->E; else key = ctx->D; padlock_aligner(out_arg, in_arg, iv_arg, key, cword, nbytes, AES_BLOCK_SIZE, encdec, mode); } static void aes_padlock_ecb(void *ctx, u8 *dst, const u8 *src, const u8 *iv, size_t nbytes, int encdec) { aes_padlock(ctx, dst, src, NULL, nbytes, encdec, CRYPTO_MODE_ECB); } static void aes_padlock_cbc(void *ctx, u8 *dst, const u8 *src, const u8 *iv, size_t nbytes, int encdec) { aes_padlock(ctx, dst, src, iv, nbytes, encdec, CRYPTO_MODE_CBC); } static void aes_padlock_cfb(void *ctx, u8 *dst, const u8 *src, const u8 *iv, size_t nbytes, int encdec) { aes_padlock(ctx, dst, src, iv, nbytes, encdec, CRYPTO_MODE_CFB); } static void aes_padlock_ofb(void *ctx, u8 *dst, const u8 *src, const u8 *iv, size_t nbytes, int encdec) { aes_padlock(ctx, dst, src, iv, nbytes, encdec, CRYPTO_MODE_OFB); } static struct crypto_capability padlock_caps[] = { {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_128, CRYPTO_MODE_ECB, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_128, CRYPTO_MODE_CBC, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_128, CRYPTO_MODE_CFB, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_128, CRYPTO_MODE_OFB, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_192, CRYPTO_MODE_ECB, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_192, CRYPTO_MODE_CBC, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_192, CRYPTO_MODE_CFB, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_192, CRYPTO_MODE_OFB, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_256, CRYPTO_MODE_ECB, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_256, CRYPTO_MODE_CBC, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_256, CRYPTO_MODE_CFB, 1000}, {CRYPTO_OP_ENCRYPT, CRYPTO_TYPE_AES_256, CRYPTO_MODE_OFB, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_128, CRYPTO_MODE_ECB, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_128, CRYPTO_MODE_CBC, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_128, CRYPTO_MODE_CFB, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_128, CRYPTO_MODE_OFB, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_192, CRYPTO_MODE_ECB, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_192, CRYPTO_MODE_CBC, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_192, CRYPTO_MODE_CFB, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_192, CRYPTO_MODE_OFB, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_256, CRYPTO_MODE_ECB, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_256, CRYPTO_MODE_CBC, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_256, CRYPTO_MODE_CFB, 1000}, {CRYPTO_OP_DECRYPT, CRYPTO_TYPE_AES_256, CRYPTO_MODE_OFB, 1000}, }; static int padlock_cap_number = sizeof(padlock_caps)/sizeof(padlock_caps[0]); static void padlock_data_ready(struct crypto_device *dev); static int padlock_data_ready_reentry; static struct crypto_device padlock_device = { .name = "via-padlock", .data_ready = padlock_data_ready, .cap = &padlock_caps[0], }; static void process_session(struct crypto_session *s) { int err; u8 *key, *dst, *src, *iv; size_t size, keylen; key = ((u8 *)page_address(s->data.sg_key.page)) + s->data.sg_key.offset; keylen = s->data.sg_key.length; dst = ((u8 *)page_address(s->data.sg_dst.page)) + s->data.sg_dst.offset; src = ((u8 *)page_address(s->data.sg_src.page)) + s->data.sg_src.offset; size = s->data.sg_src.length; iv = ((u8 *)page_address(s->data.sg_iv.page)) + s->data.sg_iv.offset; err = aes_set_key(s->data.priv, key, keylen); if (err) return; switch (s->ci.mode) { case CRYPTO_MODE_ECB: aes_padlock_ecb(s->data.priv, dst, src, iv, size, s->ci.operation); break; case CRYPTO_MODE_CBC: aes_padlock_cbc(s->data.priv, dst, src, iv, size, s->ci.operation); break; case CRYPTO_MODE_CFB: aes_padlock_cfb(s->data.priv, dst, src, iv, size, s->ci.operation); break; case CRYPTO_MODE_OFB: aes_padlock_ofb(s->data.priv, dst, src, iv, size, s->ci.operation); break; } s->data.sg_dst.length = size; return; } static void padlock_data_ready(struct crypto_device *dev) { struct crypto_session *s, *n; if (padlock_data_ready_reentry) return; padlock_data_ready_reentry++; list_for_each_entry_safe(s, n, &dev->session_list, dev_queue_entry) { if (!session_completed(s)) { start_process_session(s); process_session(s); crypto_stat_complete_inc(s); complete_session(s); stop_process_session(s); } } padlock_data_ready_reentry--; } int padlock_init_aes(void) { u32 cpuid, edx; u32 val = 0xC0000000; cpuid = cpuid_eax(val); edx = cpuid_edx(val); printk("val=%x, cpuid=%x, edx=%x.\n", val, cpuid, edx); if (cpuid >= val + 1) { printk("Board supports ACE.\n"); } else { printk("Board does not support ACE.\n"); return -ENODEV; } printk(KERN_NOTICE "Using VIA PadLock ACE for AES algorithm (multiblock).\n"); padlock_device.cap_number = padlock_cap_number; gen_tabs(); return crypto_device_add(&padlock_device); } void padlock_fini_aes(void) { crypto_device_remove(&padlock_device); }