|To:||Alan Cox <alan@xxxxxxxxxxxxxxxxxxx>|
|Subject:||Re: The ultimate TOE design|
|From:||Paul Jakma <paul@xxxxxxxx>|
|Date:||Thu, 16 Sep 2004 00:05:44 +0100 (IST)|
|Cc:||Netdev <netdev@xxxxxxxxxxx>, leonid.grossman@xxxxxxxx, Linux Kernel Mailing List <linux-kernel@xxxxxxxxxxxxxxx>|
|References:||<4148991B.firstname.lastname@example.org> <Pine.LNX.email@example.com> <firstname.lastname@example.org>|
On Wed, 15 Sep 2004, Alan Cox wrote:
Last time I checked 2Ghz accelerators for intel and AMD were quite cheap and also had the advantage they ran user mode code when idle from network processing.
Unfortunately though, my vague understanding is, the interesting bits on the IXP, the microengines, are integrated with the XScale ASIC.
I agree it's silly to stick a general purpose CPU in there, but you get it for "free" anyway.
regards, -- Paul Jakma paul@xxxxxxxx paul@xxxxxxxxx Key ID: 64A2FF6A Fortune: War is an equal opportunity destroyer.
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