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Re: [patch] e1000 TSO parameter

To: "David S. Miller" <davem@xxxxxxxxxx>
Subject: Re: [patch] e1000 TSO parameter
From: David Mosberger <davidm@xxxxxxxxxxxxxxxxx>
Date: Tue, 15 Jul 2003 23:32:48 -0700
Cc: davidm@xxxxxxxxxx, davidm@xxxxxxxxxxxxxxxxx, scott.feldman@xxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, netdev@xxxxxxxxxxx
In-reply-to: <20030715183911.1c18cc15.davem@xxxxxxxxxx>
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>>>>> On Tue, 15 Jul 2003 18:39:11 -0700, "David S. Miller" <davem@xxxxxxxxxx> 
>>>>> said:

  >>  We could, but would it always be a win?  Especially for
  >> copy_from_user().  Most of the time, that data remains cached, so
  >> I don't think we'd want to use non-temporal stores on those (in
  >> general).  csum_and_copy_from_user() isn't well optimized yet.
  >> Let's see if I can find a volunteer... ;-)

  DaveM> No, I mean "bypass L2 cache on miss" for stores.  Don't tell
  DaveM> me IA64 doesn't have that? 8) I certainly didn't mean "always
  DaveM> bypass L2 cache" for stores :-)

What I'm saying is that I almost always want copy_user() to put the
destination data in the cache, even if it isn't cached yet.  Many
copy_user() calls are for for data structures that easily fit in the
cache and the data is usually used quickly afterwards.

As for cache-hints supported by IA64: the architecture supports
various non-temporal hints (non-temporal in 1st, 2nd, or all
cache-levels).  How these hints are implemented depends on the chip.
On McKinley, non-temporal hints are generally implemented by storing
the data in the cache without updating the LRU info.  So if the data
is already there, it will stay cached (until a victim is needed).

        --david

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