Re: Route cache performance under stress

["David S. Miller" <davem@xxxxxxxxxx>]

   From: Andrew Morton <akpm@xxxxxxxxx>
   Date: Fri, 23 May 2003 17:41:56 -0700
   
   a) mips64 and cris seem to have forgotten to implement it.
   
I consider these platforms unmaintained in 2.5.x currently :-)

Without it, several generic things simply don't build.
SCSI tape is one.  Admittedly the rest of the spots are in
obscure or arch specific places.

   b) ppc and ia64 just had to sneak a bit of asm into their version
   
These are just optimizations, and I'm surprised x86 doesn't use
some clever instructions too.

   I get the feeling that we need just a single copy of this guy, in
   <linux/bitops.h>
   
True, I really doubt this is worth optimizing except to be cute.