| To: | "Eric W. Biederman" <ebiederm@xxxxxxxxxxxx> |
|---|---|
| Subject: | Re: Info: NAPI performance at "low" loads |
| From: | Alan Cox <alan@xxxxxxxxxxxxxxxxxxx> |
| Date: | 19 Sep 2002 16:53:02 +0100 |
| Cc: | "David S. Miller" <davem@xxxxxxxxxx>, hadi@xxxxxxxxxx, akpm@xxxxxxxxx, manfred@xxxxxxxxxxxxxxxx, netdev@xxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx |
| In-reply-to: | <m18z1ykoms.fsf@xxxxxxxxxxxxxxxxxxx> |
| References: | <1032381789.20498.151.camel@xxxxxxxxxxxxxxxxxxxxxxxxxxxxx> <20020918.134630.127509858.davem@xxxxxxxxxx> <1032383727.20463.155.camel@xxxxxxxxxxxxxxxxxxxxxxxxxxxxx> <20020918.142250.130847722.davem@xxxxxxxxxx> <m18z1ykoms.fsf@xxxxxxxxxxxxxxxxxxx> |
| Sender: | netdev-bounce@xxxxxxxxxxx |
On Thu, 2002-09-19 at 16:03, Eric W. Biederman wrote: > If I do an inb to a PCI-X device running at 133Mhz it should come back > much faster than an inb from my serial port on the ISA port. What > is the reason for the fixed minimum timing? As far as I can tell the minimum time for the inb/outb is simply the time it takes the bus to respond. The only difference there is that for writel rather than outl you won't wait for the write to complete on the PCI bus just dump it into the fifo if its empty |
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