On Wed, 19 Sep 2001, Guilhem Tardy wrote:
> > And that unaligned access indicates that you probably have the wrong offset.
...
> Thanks for the link, I looked at it but remain puzzled at this problem with
> "unaligned access". Could you please tell me more about it?
If you are accessing a 32 bit number, you should use a "naturally
aligned" address. In your previous example you were using
(int *)(base + 21)
If "base" is aligned, base+21 will be misaligned for all but byte accesses.
This is only a minor performance problem with the x86, but it may cause
a trap (and associated major performance problem) on other architectures.
> > Also, if you are using the 3c905C (or later) you have the "RealTimeCnt"
> > register. This is a counter at offset 0x40 intended to support
> > real-time transmit scheduling and time stamps. It is a wrapping 32 bit
> > counter that increments every 800ns.
>
> Is this supported by recent NICs from other vendors as well?
No. The 3c905C is the only low-cost board that has real time packet
scheduling.
> As for my current test, I actually don't need such a thing, since I
> already got a 8192Hz counter (by interrupt) working and an accuracy of
> a few milliseconds is enough. But if I can access this RealTimeCnt
> from other parts of the kernel AND from the application space, this
> could come handy. Do you have sample code for that?
It's trival to access in the device driver -- just read offset 0x40.
It's very difficult to use elsewhere, at least for general purpose
code.
Donald Becker becker@xxxxxxxxx
Scyld Computing Corporation http://www.scyld.com
410 Severn Ave. Suite 210 Second Generation Beowulf Clusters
Annapolis MD 21403 410-990-9993
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