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Re: Queue and SMP locking discussion (was Re: 3c59x.c)

To: Andrey Savochkin <saw@xxxxxxxxxxxxx>
Subject: Re: Queue and SMP locking discussion (was Re: 3c59x.c)
From: Andi Kleen <ak@xxxxxx>
Date: Sat, 1 Apr 2000 15:27:10 +0200
Cc: Donald Becker <becker@xxxxxxxxx>, jamal <hadi@xxxxxxxxxx>, Andrew Morton <andrewm@xxxxxxxxxx>, netdev@xxxxxxxxxxx, kuznet@xxxxxxxxxxxxx
In-reply-to: <20000401113010.A20780@xxxxxxxxxxxxx>; from Andrey Savochkin on Sat, Apr 01, 2000 at 05:32:20AM +0200
References: <Pine.GSO.4.20.0003310847310.16592-100000@xxxxxxxxxxxxxxxx> <Pine.LNX.4.10.10003311054490.2499-100000@xxxxxxxxxxxxx> <20000401113010.A20780@xxxxxxxxxxxxx>
Sender: owner-netdev@xxxxxxxxxxx
On Sat, Apr 01, 2000 at 05:32:20AM +0200, Andrey Savochkin wrote:
> Hello,
> 
> On Fri, Mar 31, 2000 at 11:16:56AM -0500, Donald Becker wrote:
> > On Fri, 31 Mar 2000, jamal wrote:
> > > Mitigation (which seems to be added to some of Donalds drivers by Jeff
> > > Garzik and Andrey Savochkin) will to a certain extent.
> 
> At least for eepro100, the receive interrupt mitigation doesn't exist in the
> driver.  There were some changes about TX completion interrupts, but I
> consider them as rather irrelevant.
> 
> The other question is that it's possible to turn on hardware interrupt
> mitigation on Intel's chips by uploading a microcode.
> Intel's driver claims to do it.

Interesting is that Intel's driver also shows how to use RX hardware checksums
(although they use a very ugly way to implement it with CHECKSUM_NONE,
instead of using CHECKSUM_HW).

Unfortunately my eepro100 is too old to have it (82557 rev 1) 


-Andi

-- 
This is like TV. I don't like TV.

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