Re: broken compiler?

[kanoj@xxxxxxxxxxxxxxxxxxx (Kanoj Sarcar)]

Seems like for the mips64 port, though we have big endian format within
a word, when we do double word operations, the lower addressed word
holds the contents of the most significant word ... ie, the significance
is swapped. 

Is this architecture defined, or is there a register that needs to be
programmed somewhere?

Kanoj

Ps: Example

volatile unsigned int test_lock = 0xabc;
volatile unsigned int test_lock3 = 0x789;

If I load the dword at address &test_lock (which is a dword aligned addr),
I get 0x78900000abc