This version of the KDB non Intel patch should apply to the latest
CVS on oss.sgi.com
-Andi
--- linux/arch/i386/kdb/kdbasupport.c-k6kdb Sat Mar 25 01:41:33 2000
+++ linux/arch/i386/kdb/kdbasupport.c Mon Apr 3 20:50:59 2000
@@ -37,6 +37,41 @@
unsigned long smp_kdb_wait;
#endif
+enum cpu { IntelP5, IntelP6, AmdK6, Unknown } kdba_msrtype;
+
+/* The normal kernel does the same, but be independent. */
+static void
+kdba_checkcpu(void)
+{
+ union {
+ char str[12];
+ __u32 reg[3];
+ } v;
+ int eax,ebx,ecx,edx;
+ __asm__("cpuid"
+ : "=a" (eax), "=b" (v.reg[0]) , "=c" (v.reg[1]), "=d" (v.reg[2])
+ : "a" (0));
+ __asm__("cpuid"
+ : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
+ : "a" (1));
+
+ kdba_msrtype = Unknown;
+ if (!strcmp(v.str, "GenuineIntel")) {
+ switch ((ebx >> 4) & 0xF) {
+ case 5:
+ kdba_msrtype = IntelP5;
+ break;
+ case 6:
+ kdba_msrtype = IntelP6;
+ break;
+ }
+ } else if (!strcmp(v.str, "AuthenticAMD") && (((ebx >> 4) & 0xF) == 6))
{
+ kdba_msrtype = AmdK6;
+ }
+}
+
+
+
void
kdba_installdbreg(kdb_bp_t *bp)
{
@@ -708,6 +743,11 @@
{
u32 lv, hv;
+ if (kdba_msrtype != IntelP6) {
+ kdb_printf("Last branch information not supported on this
CPU.\n");
+ return;
+ }
+
rdmsr(DEBUGCTLMSR, lv, hv);
lv |= 0x1; /* Set LBR enable */
wrmsr(DEBUGCTLMSR, lv, hv);
@@ -734,6 +774,11 @@
u32 bflv, bfhv;
u32 btlv, bthv;
+ if (kdba_msrtype != IntelP6) {
+ kdb_printf("Last branch information not supported on this
CPU.\n");
+ return;
+ }
+
rdmsr(LASTBRANCHFROMIP, bflv, bfhv);
rdmsr(LASTBRANCHTOIP, btlv, bthv);
kdb_printf("Last Branch IP, from: 0x%x to 0x%x\n",
@@ -1087,6 +1132,7 @@
void
kdba_init(void)
{
+ kdba_checkcpu();
kdba_enablelbr();
return;
--- linux/arch/i386/kernel/entry.S-k6kdb Sat Mar 25 01:41:33 2000
+++ linux/arch/i386/kernel/entry.S Mon Apr 3 20:52:24 2000
@@ -432,16 +432,6 @@
jmp error_code
ENTRY(page_fault)
- pushl %ecx
- pushl %edx
- pushl %eax
- movl $473,%ecx
- rdmsr
- andl $0xfffffffe,%eax
- wrmsr
- popl %eax
- popl %edx
- popl %ecx
pushl $ SYMBOL_NAME(do_page_fault)
jmp error_code
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